At Fri, 13 Aug 1999 14:01:28 -0500,
Alan Cox <alc@cs.rice.edu> wrote:
>
> On Fri, Aug 13, 1999 at 07:58:43AM -0700, Rodney W. Grimes wrote:
> > > alc 1999/08/12 14:16:55 PDT
> > >
> > > Modified files:
> > > sys/vm vm_page.h
> > > Log:
> > > Make the default page coloring parameters match a (non-Xeon) Pentium II/III.
> > >
> > > This setting is also acceptable for Celerons and Pentium Pros
> > > with less than 1MB L2 caches.
> > >
> > > Note: PQ_L2_SIZE is a misnomer. The correct number of colors is
> > > a function of the cache's degree of associativity as well as its size.
> >
> > Yea... has anyone looked at creating the right color scheme for the
> > AMD K6-III 4-way L2 cache? If access to the correct hardware is an issue
> > I should be able to help with that.
> >
>
> In theory, a Celeron needs only 8 colors, a Pentium Pro with 256KB cache
> needs only 16 colors, and a K6-III is complicated. :-)
>
> The answer for a K6-III depends on whether the coloring wants
> or needs to take into account the direct-map L3 cache. If it doesn't,
> then 16 colors should suffice. If it does, then 128 (512KB L3) or
> 256 (1MB L3) are necessary.
>
> Do you know if the inclusion property holds between the on-chip L2
> and the motherboard-level L3?
>
> As a rule, using a few too many colors is okay, but using too few
> colors is no good.
As for 21164 Alpha, it has 96KB 3-way L2 cache.
So it needs only 4 (= 96KB / 8KB / 3) colors.
My Alpha box has 4MB direct-map L3 cache and
it needs 4MB / 8KB = 512 colors. I have the following entries in my
vm_page.h
JFYI,
Index: vm_page.h
===================================================================
RCS file: /pub/FreeBSD-CVS/src/sys/vm/vm_page.h,v
retrieving revision 1.65
diff -u -r1.65 vm_page.h
--- vm_page.h 1999/08/12 21:16:53 1.65
+++ vm_page.h 1999/08/13 19:56:28
@@ -150,6 +150,12 @@
/* Each of PQ_FREE, and PQ_CACHE have PQ_HASH_SIZE entries */
/* Define one of the following */
+#if defined(PQ_JUMBOCACHE)
+#define PQ_PRIME1 31
+#define PQ_PRIME2 23
+#define PQ_L2_SIZE 512 /* A number of colors opt for 4M cache / 8K page */
+#endif
+
#if defined(PQ_HUGECACHE)
#define PQ_PRIME1 31 /* Prime number somewhat less than PQ_HASH_SIZE */
#define PQ_PRIME2 23 /* Prime number somewhat less than PQ_HASH_SIZE */
--
/\ Hidetoshi Shimokawa
\/ simokawa@sat.t.u-tokyo.ac.jp
PGP public key: finger -l simokawa@sat.t.u-tokyo.ac.jp
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