Not sure what the problem here is . Can a network chipset designer create a
with a concept of a program store? The answer is yes , if they chose to
a sloppy design thats a different issue.
> :If the pci device has the concept of a program store like in the case of
> :a bt848 chipset it is conceivable for dma or internal operations to do a retry.
> :It is a different issue if the network chipset designers chose not to have
> :a programmable dma or process control like in the bt848 .
> : Best Regards,
> : Amancio
> I know of *NO* DMA device that can do 'retries' of the magnitude that would
> be required, and this in any case does not solve the problem of the FIFO
> Network chipset designers tend to assume that they will be DMAing to or
> from main memory somewhere such that the DMA will not get 'stuck'.
> FIFOs are typically only large enough to hold a packet or two, and many
> can only hold a partial packet.
To Unsubscribe: send mail to majordomo@FreeBSD.org
with "unsubscribe freebsd-hackers" in the body of the message