On Tuesday, August 31, 2010 1:54:49 pm Matthew Jacob wrote:
> But not amd64 please.
> > Keep in mind the PAE case where you cannot effectively specify a 4GB
> > boundary. I used a 2GB boundary for twa(4) in the PAE case to deal
> > with the boundary issue. Probably though, bus_dma should just always
> > enforce a 4GB boundary, at least on x86.
Yes, thinking about this more, only i386 + PAE is special. All other cases
could represent the 4GB boundary restriction in a bus dma tag for the PCI bus
(or in the platform-specific Host-PCI bridge drivers). For i386 + PAE it
might make sense to always enforce a 4GB boundary in the bus_dma code itself.