MavEtJu's Distorted View of the World

Timing is everything

Posted on 2012-08-07 08:00:00
Tags: Numbers, Hardware

L1 cache reference ............................. 0.5 ns
Branch mispredict .............................. 5 ns
L2 cache reference ............................. 7 ns
Mutex lock/unlock ............................. 25 ns
Main memory reference ........................ 100 ns
Compress 1K bytes with Zippy ............... 3,000 ns (3 us)
Send 2K bytes over 1 Gbps network ......... 20,000 ns (20 us)
SSD random read .......................... 150,000 ns (150 us)
Read 1 MB sequentially from memory ....... 250,000 ns (250 us)
Round trip within same datacenter ........ 500,000 ns (500 us)
Read 1 MB sequentially from SSD* ....... 1,000,000 ns (1 ms)
Disk seek ............................. 10,000,000 ns (10 ms)
Read 1 MB sequentially from disk ...... 20,000,000 ns (20 ms)
Send packet AU -> Netherlands -> AU .. 320,000,000 ns (320 ms)

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